High-NA EUV Adoption by TSMC Drives Need for 6x12‑inch Photomasks
TSMC and ASML recently announced a significant development in semiconductor manufacturing: TSMC will adopt High-NA EUV (Extreme Ultraviolet) lithography for high-volume manufacturing by 2030. To make this economically viable, both companies are pushing the industry to adopt larger 6x12 inch rectangular photomasks. The plan includes a pilot line by 2031 and full high-volume production by 2033.
High-NA EUV Technology Overview
High-NA EUV is ASML's successor to current EUV technology. NA, or numerical aperture, is a dimensionless number that measures how much light an optical system can collect and focus. A higher NA leads to better resolution. Most of TSMC's current EUV machines are low-NA, with an NA value of 0.33. High-NA EUV increases this to 0.55, shrinking the half-pitch lines to 7.5 or 8 nm, which helps reduce expensive multi-patterning practices.
However, increasing the NA requires larger mirrors and results in bigger light cones. To prevent these light cones from interfering and to maintain ideal reflection angles, ASML had to magnify the light cones eight times along one axis. This reduces the field size to half of the industry standard (16.5 x 26 mm, compared to the full standard of 33 x 26 mm). This means a single exposure shot only covers half the design, necessitating two shots where one was previously sufficient. For chips larger than this half-field exposure area, such as AI chips, two different exposures (A and B) must be stitched together. This process is generally disliked by chip designers as it introduces a "Korean DMZ" between the two halves of their design.
ASML faced a dilemma: either accept the smaller field size or convince the industry to adopt larger masks to achieve better resolution.
The Economic Challenge of High-NA EUV
High-NA EUV has been technically "ready" for some time, with impressive resolution results from firms like IMEC. TSMC also has these machines in R&D. The main hurdle has always been economic. TSMC SVP Kevin Tang noted in 2024 that the cost of a High-NA EUV machine, estimated at $350 million and requiring 20 to 40 megawatts of power, is very high. The reduced field size significantly deteriorates throughput, making multi-patterning a more economical choice than stitching.
The Solution: 6x12 Inch Photomasks
A 6x12 inch mask for High-NA EUV re-enables full-field exposure, as highlighted by Intel. This can increase scanner productivity by 23% to 50%, potentially cutting the cost gap with low-NA EUV in half. Eliminating stitching also restores chip design flexibility. ASML CEO Kristof Fouquet publicly advocated for double-sized masks as early as October 2024, calling it a "no-brainer."
Once developed, 6x12 inch masks could also be incorporated into low-NA EUV machines, effectively doubling the available real estate. This could enable even larger AI chips or allow for printing at twice the speed. A low-NA EUV machine equipped with 6x12 inch masks is estimated to pattern 450 wafers per hour or more.
ASML has designed the reticle chamber with 11.2 inches of travel space for the larger mask, meaning the precise size will be 6x11.2 inches. However, the industry standard terminology for this will remain 6x12 inches.
Photomask Manufacturing and Supply Chain Challenges
While the economic argument for 6x12 inch High-NA EUV masks is compelling, their adoption presents significant challenges.
Photomask Blank Production
Photomasks are essentially perfect, flat, smooth surfaces with no defects. 1. Substrate: They start with ultra-flat glass made from low thermal expansion material to prevent warping from the 35-50°C operating temperatures. 2. Polishing: The glass is meticulously polished to achieve a perfect surface. 3. Multi-layer Reflectors: 40 pairs of alternating molybdenum and silicon layers, each about 7 nm thick, are deposited using ion beam deposition. This process requires precise uniformity, achieved by spinning the substrate and varying the ion beam angle. 4. Dielectric Layer: An insulating dielectric layer (silicon dioxide or ruthenium) acts as a protective buffer and etch stop. 5. Absorber Layer: A UV radiation absorber layer, often made from tantalum, is applied to prevent reflection. The chip design is patterned by etching into this layer. 6. Pellicle: A membrane-like pellicle made from silicon or carbon nanotubes is placed over the mask to prevent particles from causing print errors. 7. Backside Coating: An electrically conductive backside coating on the glass allows the blank to be held securely by an electrostatic chuck.
Achieving defect-free blanks is difficult, but scaling this perfection to high-volume manufacturing is the true challenge.
Supply Chain and Ecosystem Impact
The EUV photomask supply chain is complex, involving numerous specialized companies: * Mask Shops: Captive (e.g., Samsung, Intel, TSMC) or merchant (e.g., Toppan, DNP) shops assemble the masks. * EUV Mask Blanks: Primarily from Japanese firms AGC and Hoya. * Pellicles: Mitsui Chemicals (Japan) or Kanatu (Finland). * Protective Pod Carriers: Integris (US) and Gutang Precision Industrial (Taiwan). * Writers: IMS or NuFlare. * Etchers and Cleaners: Applied Materials and Shibara. * Defect Inspection Tools: KLA or Lasertec. * Repair Equipment and Optical Verification: Zeiss.
A substantial portion of this ecosystem must commit to the larger masks.
Technical and Economic Hurdles for Larger Masks
- Multi-layer Performance: Maintaining consistent multi-layer performance across a larger form factor and ensuring even reflection of 13.5 nm wavelength light.
- Physical Stress: The larger masks must maintain the same 0.25-inch thickness as 6x6 inch masks but will be nearly twice the weight, raising concerns about sagging and handling stress.
- Industry-Wide Disruption: The transition to 6x12 inch photomasks is a disruptive physical change affecting every part of the photomask ecosystem, from substrates to writers, etchers, and inspection tools.
- Mask Shops: This change is most disruptive for mask shops and their suppliers. They may need to rebuild their facilities, potentially operating new and old lines simultaneously, which is expensive. New tools for larger masks are estimated to cost 20% to 100% more.
- Wafer Fabs: For wafer fabs, the changes are less extensive, primarily involving modifications to scanners and mask handling, inspection, and stocking equipment.
The industry also faces challenges related to High-NA EUV specific aspects like stitching, anamorphic exposure, and the adoption of curvilinear masks with Inverse Lithography Technology (ILT). These require significant upfront investment with a need for a clear return on investment within three to five years.
Risks and Progress
A potential risk is the concentration of players, leading to single-source dependencies. Technical issues or supply chain problems with any major player could cause substantial delays.
Despite these challenges, progress is being made: * Standards: Companies like Taiwan's Gutang are working with SEMI to standardize carriers for larger masks (e.g., RSP 612 carriers). Gutang has published research on the repercussions of larger masks within their carriers. * Prototypes: Posetta, a transporter company, already offers a 6x12 inch photomask carrier. AGC has started making larger prototype blanks, and Intel mentioned receiving these prototypes in 2025. * Industry Momentum: Intel has been championing large masks for High-NA EUV since 2023, openly collaborating with partners. The recent announcements from TSMC and Samsung (who released a similar press release on the same day) signal full industry commitment.
The Cost and Future Outlook
The cost of EUV mask sets is already tens of millions of dollars, six times that of regular optical mask sets, and they last only a fifth as long. The number of masks per set is also increasing. The "trillion-dollar question" is the sustainability of the industry. The current EUV market is booming, but it's uncertain if this will continue when larger masks hit the fab floors. Given the rapid pace of the AI industry, the landscape could be very different by 2030. TSMC's five-to-seven-year timeline suggests an awareness of these uncertainties, committing to the goal regardless of future economic and industry conditions.
Takeaways
- TSMC plans to begin high‑volume manufacturing with High‑NA EUV by 2030, launching a pilot line in 2031 and full production by 2033.
- High‑NA EUV raises the numerical aperture from 0.33 to 0.55, shrinking half‑pitch to about 8 nm but halving the exposure field, which forces two shots or stitching for many designs.
- Adopting 6×12‑inch photomasks restores full‑field exposure, potentially boosting scanner productivity by 23‑50 % and cutting the cost gap with low‑NA EUV roughly in half.
- Creating defect‑free 6×12‑inch masks requires new glass blanks, larger multi‑layer reflectors, and upgrades across the entire photomask supply chain, increasing capital costs for mask shops and equipment makers.
- Industry leaders such as Intel and ASML are already prototyping larger masks, viewing the transition as essential for future AI‑chip scaling despite supply‑chain risks and economic challenges.
Frequently Asked Questions
Why does High‑NA EUV reduce the exposure field size compared to low‑NA EUV?
High‑NA EUV uses a larger numerical aperture, which enlarges the light cone and requires the mirrors to be bigger; to keep the cone from overlapping, ASML magnified the cone eightfold along one axis, cutting the usable field to half of the standard 33 × 26 mm size. This reduction forces two exposures where one would suffice.
How do 6×12‑inch photomasks improve productivity for High‑NA EUV scanners?
By restoring the full‑field exposure area, 6×12‑inch masks eliminate the need for stitching, allowing a single shot to cover the entire design; this can raise scanner throughput by 23‑50 % and cut the cost gap with low‑NA EUV roughly in half, making High‑NA machines more economically viable.
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